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authorAmlal El Mahrouss <amlal@nekernel.org>2025-08-17 07:55:38 +0200
committerGitHub <noreply@github.com>2025-08-17 07:55:38 +0200
commit7802a79f34c6f96f1c1ead72098c449b1a8826d8 (patch)
tree9a1b0ce29eb1bcf7ca443fcd9500d3e54a268eb3 /src
parent31d6c0c1ee8ac790399efc3949a2806dca44d301 (diff)
parent2835bd8b264d52dc922cc303c0c5e5ddb6aedb99 (diff)
Merge pull request #6 from nekernel-org/dev
v0.0.1
Diffstat (limited to 'src')
-rw-r--r--src/amd64/amd64-boot.asm2
-rw-r--r--src/amd64/amd64-test.asm2
-rw-r--r--src/arm64/arm64-30pin.c4
-rw-r--r--src/arm64/arm64-err.c18
-rw-r--r--src/arm64/arm64-uart.c46
-rw-r--r--src/arm64/ci.make4
-rw-r--r--src/arm64/makefile4
-rw-r--r--src/coreboot-cpu-api.c22
-rw-r--r--src/coreboot-cxx-abi.cc91
-rw-r--r--src/coreboot-partition-map-parse.c60
-rw-r--r--src/coreboot-partition-map.c37
-rw-r--r--src/coreboot-pci-tree.c106
-rw-r--r--src/coreboot-print-name.c28
-rw-r--r--src/coreboot-start.c168
-rw-r--r--src/coreboot-string.c185
-rw-r--r--src/hal/coreboot-ahci-driver.c108
-rw-r--r--src/hal/neboot-ahci-driver.c96
-rw-r--r--src/hal/neboot-flash-driver.c (renamed from src/hal/coreboot-flash.c)2
-rw-r--r--src/neboot-bootnet.c (renamed from src/coreboot-bootnet.c)2
-rw-r--r--src/neboot-cpu-api.c20
-rw-r--r--src/neboot-cxx-abi.cc77
-rw-r--r--src/neboot-partition-map-parse.c42
-rw-r--r--src/neboot-partition-map.c30
-rw-r--r--src/neboot-pci-tree.c96
-rw-r--r--src/neboot-print-name.c27
-rw-r--r--src/neboot-start.c155
-rw-r--r--src/neboot-string.c153
-rw-r--r--src/ppc64/makefile4
-rw-r--r--src/ppc64/ppc64-boot.S6
-rw-r--r--src/ppc64/ppc64-err.c18
-rw-r--r--src/ppc64/ppc64-hal.c147
-rw-r--r--src/ppc64/ppc64-uart.c37
-rw-r--r--src/rv64/ci.make4
-rw-r--r--src/rv64/makefile4
-rw-r--r--src/rv64/rv64-api.s2
-rw-r--r--src/rv64/rv64-boot.s6
-rw-r--r--src/rv64/rv64-err.c18
-rw-r--r--src/rv64/rv64-uart.c52
38 files changed, 866 insertions, 1017 deletions
diff --git a/src/amd64/amd64-boot.asm b/src/amd64/amd64-boot.asm
index bcd6058..d578aa9 100644
--- a/src/amd64/amd64-boot.asm
+++ b/src/amd64/amd64-boot.asm
@@ -1,4 +1,4 @@
-;; AMD64 CoreBoot Master Boot Program.
+;; AMD64 NeBoot Master Boot Program.
;; Written by Amlal EL Mahrouss
%define ENTRYPOINT 0x00FF
diff --git a/src/amd64/amd64-test.asm b/src/amd64/amd64-test.asm
index 2a8bef8..b89e522 100644
--- a/src/amd64/amd64-test.asm
+++ b/src/amd64/amd64-test.asm
@@ -1,4 +1,4 @@
-;; AMD64 CoreBoot Sample program.
+;; AMD64 NeBoot Sample program.
;; Written by Amlal EL Mahrouss
[bits 16]
diff --git a/src/arm64/arm64-30pin.c b/src/arm64/arm64-30pin.c
index f347f0d..eb89c67 100644
--- a/src/arm64/arm64-30pin.c
+++ b/src/arm64/arm64-30pin.c
@@ -1,10 +1,10 @@
/* -------------------------------------------
- Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
------------------------------------------- */
-#include <lib/partition-map.h>
#include <lib/30pin.h>
+#include <lib/partition-map.h>
extern size_t cb_read_30pin(voidptr_t blob, size_t* size, size_t* start_lba);
diff --git a/src/arm64/arm64-err.c b/src/arm64/arm64-err.c
index 052b302..c734ada 100644
--- a/src/arm64/arm64-err.c
+++ b/src/arm64/arm64-err.c
@@ -1,6 +1,6 @@
/* -------------------------------------------
- Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
------------------------------------------- */
@@ -10,14 +10,12 @@
/// @brief Goes into a panic state.
/// @param reason why?
-void cb_panic(const char* reason)
-{
- cb_put_string("panic: ");
- cb_put_string(reason);
- cb_put_char('\n');
+void cb_panic(const char* reason) {
+ cb_put_string("panic: ");
+ cb_put_string(reason);
+ cb_put_char('\n');
- while (yes)
- {
- asm volatile("hlt #0");
- }
+ while (yes) {
+ asm volatile("hlt #0");
+ }
}
diff --git a/src/arm64/arm64-uart.c b/src/arm64/arm64-uart.c
index 7455626..4723204 100644
--- a/src/arm64/arm64-uart.c
+++ b/src/arm64/arm64-uart.c
@@ -1,6 +1,6 @@
/* -------------------------------------------
- Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
------------------------------------------- */
@@ -9,47 +9,37 @@
/// BUGS: 0
-#define ARM64_MMIO_REG(addr) (*(volatile uint32_t*)(cb_uart_ptr + addr))
+#define ARM64_MMIO_REG(addr) (*(volatile uint32_t*) (cb_uart_ptr + addr))
/* this file handles the UART */
-static uint32_t* cb_uart_ptr = (uint32_t*)CB_UART_BASE;
-
-// we need that one, to avoid sending mutliple chars to UART.
-static boolean cb_locked_put_char = no;
+static uint32_t* cb_uart_ptr = (uint32_t*) NB_UART_BASE;
/// @brief Retrieve character from cb_uart_ptr
-utf_char_t cb_get_char(void)
-{
- while ((ARM64_MMIO_REG(0x018) & (1 << 4)))
- {
- }
+utf_char_t cb_get_char(void) {
+ while ((ARM64_MMIO_REG(0x018) & (1 << 4))) {
+ }
- return (utf_char_t)ARM64_MMIO_REG(0x0) & 0xFF;
+ return (utf_char_t) ARM64_MMIO_REG(0x0) & 0xFF;
}
-void cb_put_char(utf_char_t ch)
-{
- while ((ARM64_MMIO_REG(0x018) & (1 << 5)))
- {
- }
+void cb_put_char(utf_char_t ch) {
+ while ((ARM64_MMIO_REG(0x018) & (1 << 5))) {
+ }
- ARM64_MMIO_REG(0x0) = ch;
+ ARM64_MMIO_REG(0x0) = ch;
}
/// @brief UART put string
/// @param text the input text.
-size_t cb_put_string(const char* text)
-{
- if (text == nil)
- return 0;
+size_t cb_put_string(const char* text) {
+ if (text == nil) return 0;
- size_t i = 0;
+ size_t i = 0;
- for (; i < strlen(text); i++)
- {
- cb_put_char(text[i]);
- }
+ for (; i < strlen(text); i++) {
+ cb_put_char(text[i]);
+ }
- return i;
+ return i;
}
diff --git a/src/arm64/ci.make b/src/arm64/ci.make
index 07f1746..2b0fed2 100644
--- a/src/arm64/ci.make
+++ b/src/arm64/ci.make
@@ -1,7 +1,7 @@
#
# ========================================================
#
- # CoreBoot
+ # NeBoot
# Date Added: 08/11/2023
# Copyright 2024, Amlal El Mahrouss, all rights reserved.
#
@@ -34,7 +34,7 @@ WAIT=sleep 1
.PHONY: all
all: firmware-link
- @echo "[CoreBoot] build done."
+ @echo "[NeBoot] build done."
.PHONY: firmware-link
firmware-link: firmware-compile
diff --git a/src/arm64/makefile b/src/arm64/makefile
index 8d05e8b..a85553b 100644
--- a/src/arm64/makefile
+++ b/src/arm64/makefile
@@ -1,7 +1,7 @@
#
# ========================================================
#
- # CoreBoot
+ # NeBoot
# Date Added: 08/11/2023
# Copyright 2024, Amlal El Mahrouss, all rights reserved.
#
@@ -34,7 +34,7 @@ WAIT=sleep 1
.PHONY: all
all: firmware-link
- @echo "[CoreBoot] build done."
+ @echo "[NeBoot] build done."
.PHONY: firmware-link
firmware-link: firmware-compile
diff --git a/src/coreboot-cpu-api.c b/src/coreboot-cpu-api.c
deleted file mode 100644
index c118192..0000000
--- a/src/coreboot-cpu-api.c
+++ /dev/null
@@ -1,22 +0,0 @@
-/* -------------------------------------------
-
- Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
-
-------------------------------------------- */
-
-#include <lib/boot.h>
-
-/// @brief Restarts the computer.
-/// @param none.
-void cb_restart_machine(void)
-{
-#ifdef __COMPILE_RISCV__
- volatile uint32_t* brd_pwr = (volatile uint32_t*)0x100000;
- *brd_pwr = 0x7777; // send reboot signal from DMA.
-
- while (1)
- {
- asm volatile("wfi");
- }
-#endif
-}
diff --git a/src/coreboot-cxx-abi.cc b/src/coreboot-cxx-abi.cc
deleted file mode 100644
index 858ba5e..0000000
--- a/src/coreboot-cxx-abi.cc
+++ /dev/null
@@ -1,91 +0,0 @@
-/* -------------------------------------------
-
- Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
-
-------------------------------------------- */
-
-#include <lib/cxx-abi.h>
-
-/// BUGS: 0
-
-extern "C" __SIZE_TYPE__ cb_put_string(const char* text);
-extern "C" void cb_panic(const char* reason);
-
-extern "C" void __stack_chk_fail()
-{
- cb_put_string("[stack-canary] Buffer overflow detected, halting...\n");
- cb_panic("stack_canary_fail");
-}
-
-void* __dso_handle;
-
-extern "C" __SIZE_TYPE__ cb_put_string(const char* text);
-extern "C" void cb_panic(const char* reason);
-
-atexit_func_entry_t __atexit_funcs[DSO_MAX_OBJECTS];
-uarch_t __atexit_func_count;
-
-extern "C" void __cxa_pure_virtual()
-{
- cb_put_string("[__cxa_pure_virtual] Placeholder\n");
-}
-
-extern "C" int __cxa_atexit(void (*f)(void*), void* arg, void* dso)
-{
- if (__atexit_func_count >= DSO_MAX_OBJECTS)
- return -1;
-
- __atexit_funcs[__atexit_func_count].destructor_func = f;
- __atexit_funcs[__atexit_func_count].obj_ptr = arg;
- __atexit_funcs[__atexit_func_count].dso_handle = dso;
-
- __atexit_func_count++;
-
- return 0;
-}
-
-extern "C" void __cxa_finalize(void* f)
-{
- uarch_t i = __atexit_func_count;
- if (!f)
- {
- while (i--)
- {
- if (__atexit_funcs[i].destructor_func)
- {
- (*__atexit_funcs[i].destructor_func)(__atexit_funcs[i].obj_ptr);
- };
- }
-
- return;
- }
-
- while (i--)
- {
- if (__atexit_funcs[i].destructor_func)
- {
- (*__atexit_funcs[i].destructor_func)(__atexit_funcs[i].obj_ptr);
- __atexit_funcs[i].destructor_func = 0;
- };
- }
-}
-
-namespace cxxabiv1
-{
- extern "C" int __cxa_guard_acquire(__guard* g)
- {
- (void)g;
- return 0;
- }
-
- extern "C" int __cxa_guard_release(__guard* g)
- {
- *(char*)g = 1;
- return 0;
- }
-
- extern "C" void __cxa_guard_abort(__guard* g)
- {
- (void)g;
- }
-} // namespace cxxabiv1
diff --git a/src/coreboot-partition-map-parse.c b/src/coreboot-partition-map-parse.c
deleted file mode 100644
index 85ccf1b..0000000
--- a/src/coreboot-partition-map-parse.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/* -------------------------------------------
-
- Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
-
-------------------------------------------- */
-
-#include <lib/partition-map.h>
-
-bool cb_parse_partition_block_data_at(voidptr_t blob, size_t blob_sz, size_t index, size_t* end_lba, size_t* start_lba, size_t* sector_sz)
-{
- if (!start_lba ||
- !end_lba ||
- !blob ||
- !blob_sz ||
- !sector_sz ||
- (sizeof(part_block_t) * index) > blob_sz)
- return false;
-
- part_block_t* block = (part_block_t*)(blob + (sizeof(part_block_t) * index));
-
- if (block->version != EPM_REVISION ||
- block->num_blocks < 1 ||
- block->num_blocks > EPM_MAX_BLKS ||
- strcmp(block->magic, EPM_MAGIC) > 0 ||
- block->lba_end == 0 ||
- block->lba_start == 0)
- {
- return false;
- }
-
- *end_lba = block->lba_end;
- *start_lba = block->lba_start;
- *sector_sz = block->sector_sz;
-
- return true;
-}
-
-part_block_t* cb_parse_partition_block_at(voidptr_t blob, size_t blob_sz, size_t index)
-{
- if (!blob ||
- !blob_sz ||
- (sizeof(part_block_t) * index) > blob_sz)
- return nil;
-
- part_block_t* block = (part_block_t*)(blob + (sizeof(part_block_t) * index));
-
- cb_put_string(block->magic);
-
- if (block->version != EPM_REVISION ||
- block->num_blocks < 1 ||
- block->num_blocks > EPM_MAX_BLKS ||
- strcmp(block->magic, EPM_MAGIC) > 0 ||
- block->lba_end == 0 ||
- block->lba_start == 0)
- {
- return nil;
- }
-
- return block;
-} \ No newline at end of file
diff --git a/src/coreboot-partition-map.c b/src/coreboot-partition-map.c
deleted file mode 100644
index 69bcddd..0000000
--- a/src/coreboot-partition-map.c
+++ /dev/null
@@ -1,37 +0,0 @@
-/* -------------------------------------------
-
- Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
-
-------------------------------------------- */
-
-#include <lib/partition-map.h>
-#include <lib/string.h>
-
-// include this for documentation.
-
-#define CB_FILESYSTEM_COUNT 4
-#define CB_FILESYSTEM_LIST \
- { \
- "NeFS", "HeFS", "FAT32", "ext4" \
- }
-
-/// @brief check if filesystem is supported by CoreBoot.
-/// @param fs the filesystem magic, as provided by EPM.
-boolean cb_filesystem_exists(caddr_t fs, size_t len)
-{
- if (fs == nil ||
- *fs == 0)
- return no;
-
- char* fs_list[] = CB_FILESYSTEM_LIST;
-
- for (size_t fs_index = 0; fs_index < CB_FILESYSTEM_COUNT; fs_index++)
- {
- if (strncmp(fs_list[fs_index], fs, strlen(fs_list[fs_index])) == 0)
- {
- return yes;
- }
- }
-
- return no;
-}
diff --git a/src/coreboot-pci-tree.c b/src/coreboot-pci-tree.c
deleted file mode 100644
index b39c024..0000000
--- a/src/coreboot-pci-tree.c
+++ /dev/null
@@ -1,106 +0,0 @@
-/* -------------------------------------------
-
- Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
-
-------------------------------------------- */
-
-/**
- * @file coreboot-pci-tree.c
- * @author Amlal EL Mahrouss (amlal@nekernel.org)
- * @brief PCI tree implementation.
- * @version 0.1
- * @date 2024-01-22
- *
- * @copyright Copyright (c) 2024 Amlal EL Mahrouss
- *
- */
-
-#include <lib/pci-tree.h>
-#include <lib/string.h>
-
-/// BUGS: 0
-
-/// Standard Root table (Mahrouss Table)
-#define CB_PCI_ROOT_NAME "/pci-tree/@/"
-
-static struct hw_cb_pci_tree* cb_base_tree = nil;
-static struct hw_cb_pci_tree* cb_latest_tree = nil;
-static struct hw_cb_pci_tree* cb_last_tree = nil;
-
-/// \brief Init the PCI device tree structure.
-/// \return if it already exists -> false
-/// Otherwise true.
-boolean cb_pci_init_tree(void)
-{
- cb_base_tree = (struct hw_cb_pci_tree*)(CB_PCI_TREE_BASE);
-
- // huh? anyway let's ignore it then.
- if (cb_base_tree->d_magic != CB_PCI_DEV_MAGIC)
- {
- cb_base_tree->d_magic = CB_PCI_DEV_MAGIC;
-
- memncpy(cb_base_tree->d_name, CB_PCI_ROOT_NAME, strlen(CB_PCI_ROOT_NAME));
-
- cb_base_tree->d_next_sibling = 0;
- cb_base_tree->d_off_props = 0;
- cb_base_tree->d_sz_struct = 0;
- cb_base_tree->d_sz_props = 0;
- cb_base_tree->d_off_struct = 0;
- cb_base_tree->d_version = CB_PCI_VERSION;
-
- cb_base_tree->d_next_sibling =
- (cb_pci_num_t)(cb_base_tree + sizeof(struct hw_cb_pci_tree));
- cb_base_tree->d_first_node = (cb_pci_num_t)cb_base_tree;
-
- cb_put_string(">> Append root device: " CB_PCI_ROOT_NAME "\r\n");
- }
-
- cb_latest_tree = cb_base_tree;
-
- return yes;
-}
-
-/// \brief Adds a new device to the tree.
-/// \param name the device name.
-/// \param struct_ptr the struct containing the device.
-/// \param struct_sz the structure size.
-boolean cb_pci_append_tree(const caddr_t name, cb_pci_num_t struct_ptr, cb_pci_num_t struct_sz)
-{
- if (!name || *name == 0 || cb_latest_tree == nil)
- return no;
-
- struct hw_cb_pci_tree* cb_pci_tree = (struct hw_cb_pci_tree*)(cb_latest_tree);
-
- while (cb_pci_tree->d_magic == CB_PCI_DEV_MAGIC)
- {
- if (strcmp(cb_pci_tree->d_name, name) == 0)
- return no;
-
- cb_pci_tree =
- (struct hw_cb_pci_tree*)(cb_pci_tree +
- sizeof(struct hw_cb_pci_tree));
- }
-
- cb_pci_tree->d_magic = CB_PCI_DEV_MAGIC;
-
- memncpy(cb_pci_tree->d_name, name, strlen(name));
-
- cb_pci_tree->d_off_struct = struct_ptr;
- cb_pci_tree->d_sz_struct = struct_sz;
- cb_pci_tree->d_off_props = 0;
- cb_pci_tree->d_sz_props = 0;
- cb_pci_tree->d_version = CB_PCI_VERSION;
-
- cb_pci_tree->d_next_sibling =
- (cb_pci_num_t)(cb_pci_tree + sizeof(struct hw_cb_pci_tree));
- cb_pci_tree->d_first_node = (cb_pci_num_t)cb_latest_tree;
-
- cb_latest_tree = cb_pci_tree;
- cb_last_tree = cb_pci_tree;
-
- cb_put_string(">> Append device: ");
- cb_put_string(name);
- cb_put_string("\r\n");
-
- return yes;
-}
diff --git a/src/coreboot-print-name.c b/src/coreboot-print-name.c
deleted file mode 100644
index e2ad8c4..0000000
--- a/src/coreboot-print-name.c
+++ /dev/null
@@ -1,28 +0,0 @@
-/* -------------------------------------------
-
- Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
-
-------------------------------------------- */
-
-#include <lib/boot.h>
-
-/// @brief Print firmware name.
-/// @param
-void cb_print_name(void)
-{
-#ifdef __COMPILE_POWERPC__
- cb_put_string(">> CoreBoot for POWERPC.\r\n");
-#endif // __COMPILE_POWERPC__
-
-#ifdef __COMPILE_ARM64__
- cb_put_string(">> CoreBoot for ARM64.\r\n");
-#endif // __COMPILE_POWERPC__
-
-#ifdef __COMPILE_AMD64__
- cb_put_string(">> CoreBoot for AMD64.\r\n");
-#endif // __COMPILE_POWERPC__
-
-#ifdef __COMPILE_RISCV__
- cb_put_string(">> CoreBoot for RISC-V.\r\n");
-#endif // __COMPILE_POWERPC__
-}
diff --git a/src/coreboot-start.c b/src/coreboot-start.c
deleted file mode 100644
index cfcc668..0000000
--- a/src/coreboot-start.c
+++ /dev/null
@@ -1,168 +0,0 @@
-/* -------------------------------------------
-
- Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
-
-------------------------------------------- */
-
-#include <lib/mp-bit.h>
-#include <lib/partition-map.h>
-#include <lib/pci-tree.h>
-#include <lib/boot.h>
-
-/// BUGS: 0
-
-/////////////////////////////////////////////////////////////////////////////////////////
-
-// @name start.c //
-
-// @brief Start file // This is where the firmware starts it's initialization //
-// code. //
-
-// @author Amlal EL Mahrouss //
-
-/////////////////////////////////////////////////////////////////////////////////////////
-
-extern void cb_start_context(uintptr_t);
-extern void cb_start_rom(void);
-
-extern int cb_boot_processor_ready;
-
-/// @brief hardware thread counter (rv64 only)
-#ifdef __COMPILE_RISCV__
-uint64_t __cb_hart_counter = 0UL;
-#endif
-
-/// @brief Start executing the firmware.
-/// @param
-void cb_start_exec(void)
-{
-#ifndef __COMPILE_RISCV__
- static uint64_t __cb_hart_counter = 0UL;
-#endif
-
- ++__cb_hart_counter;
-
- uintptr_t hart = __cb_hart_counter;
-
- // let the hart 0 init our stuff.
- if (hart == 0)
- {
- cb_put_string("CB> Welcome to CoreBoot, (c) Amlal EL Mahrouss. Built the ");
- cb_put_string(__DATE__);
- cb_put_string("\r\r\n");
-
-#ifdef __COMPILE_POWERPC__
- cb_put_string("CB> CPU: PowerPC 64-bit Based SoC.\r\r\n");
-#endif // __COMPILE_POWERPC__
-
-#ifdef __COMPILE_AMD64__
- cb_put_string("CB> CPU: x64 Based SoC.\r\r\n");
-#endif // __COMPILE_AMD64__
-
-#ifdef __COMPILE_ARM64__
- cb_put_string("CB> CPU: AArch64 Based SoC.\r\r\n");
-#endif // __COMPILE_ARM64__
-
-#ifdef __COMPILE_ARM32__
- cb_put_string("CB> CPU: AArch32 Based SoC.\r\r\n");
-#endif // __COMPILE_ARM64__
-
-#ifdef __COMPILE_RISCV__
- cb_put_string("CB> CPU: RV64 Based SoC.\r\r\n");
-#endif // __COMPILE_RISCV__
- }
-
- /// @brief Boots here if LX header matches what we except.
-
- volatile struct cb_boot_header* boot_hdr =
- (volatile struct cb_boot_header*)(CB_FLASH_BASE_ADDR);
-
- /**
- boot if:
- - ident matches.
- - version matches.
- */
-
- if (boot_hdr->h_mag[0] == CB_BOOT_MAG_0 &&
- boot_hdr->h_mag[1] == CB_BOOT_MAG_1)
- {
- if (boot_hdr->h_revision != CB_BOOT_VER)
- {
- if (hart == 0)
- {
- cb_put_string("CB> Can't Boot the StageTwo, LX invalid signature. (CB0003)\r\n");
- }
- }
- else
- {
- if (hart == 0)
- {
- cb_pci_append_tree("@stage2-lx", (cb_pci_num_t)boot_hdr, sizeof(struct cb_boot_header));
-
- cb_put_string("CB> Executing StageTwo: ");
- cb_put_string((const char*)boot_hdr->h_name);
- cb_put_char('\r');
- cb_put_char('\n');
-
- // printf("CB> address: %x\n", boot_hdr->h_start_address);
- }
-
- if (boot_hdr->h_start_address != 0)
- {
- cb_boot_processor_ready = 1;
- cb_start_context(boot_hdr->h_start_address);
- }
-
- cb_put_string("CB> StageTwo has returned? (CB0002)\r\n");
- }
- }
- else
- {
- cb_put_string("CB> Trying EPM partition...\r\n");
-
- part_block_t* blk = cb_parse_partition_block_at((voidptr_t)CB_FLASH_BASE_ADDR, EPM_PART_BLK_SZ, 0);
-
- if (blk)
- {
- cb_pci_append_tree("@stage2-epm", (cb_pci_num_t)blk, sizeof(part_block_t) * blk->num_blocks);
-
- size_t indx = 0;
- size_t end_lba, start_lba, sector_sz;
-
- while (indx < blk->num_blocks)
- {
- if (cb_parse_partition_block_data_at(blk, EPM_PART_BLK_SZ * blk->num_blocks, indx, &end_lba, &start_lba, &sector_sz) == no)
- {
- ++indx;
- continue;
- }
-
- cb_boot_processor_ready = 1;
- cb_start_context((uintptr_t)(voidptr_t)blk + start_lba);
-
- if (hart == 1)
- {
- cb_put_string("CB> Can't boot to StageTwo. (CB0001)\r\n");
- }
- }
- }
-
- if (hart == 1)
- {
- cb_put_string("CB> Can't boot to StageTwo via EPM, no bootable partition blocks found. (CB0001)\r\n");
- }
- }
-
- /// end of TODO
-
- if (hart > 1)
- {
- while (yes)
- {
- if (__cb_hart_counter == 0)
- {
- cb_restart_machine();
- }
- }
- }
-}
diff --git a/src/coreboot-string.c b/src/coreboot-string.c
deleted file mode 100644
index 491095d..0000000
--- a/src/coreboot-string.c
+++ /dev/null
@@ -1,185 +0,0 @@
-/* -------------------------------------------
-
- Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
-
-------------------------------------------- */
-
-/**
- * @file coreboot-string.c
- * @author Amlal EL Mahrouss (amlal@nekernel.org)
- * @brief string library.
- * @version 0.1
- * @date 2024-01-16
- *
- * @copyright Copyright (c) 2024 Amlal EL Mahrouss
- *
- */
-
-#include <lib/string.h>
-
-/// BUGS: 0
-
-size_t strncmp(const char* src, const char* cmp, size_t size)
-{
- if (src == nil)
- return 0;
-
- int32_t counter = 0;
-
- for (size_t index = 0; index < size; ++index)
- {
- if (src[index] != cmp[index])
- ++counter;
- }
-
- return counter;
-}
-
-void* memset(void* ptr, const char value, size_t len)
-{
- if (ptr == nil)
- return nil;
-
- char* start = ptr;
-
- while (len)
- {
- *start = value;
- ++start;
-
- --len;
- }
-
- return (void*)start;
-}
-
-void* memmove(void* dest, const void* src, size_t len)
-{
- memncpy(dest, src, len);
- return dest;
-}
-
-size_t memcpy(void* dst, const void* src)
-{
- if (src == nil || dst == nil)
- return 0;
-
- const char* src_chr = src;
- char* dst_chr = dst;
- size_t index = 0;
- size_t len = strlen(src);
-
- while (index < len)
- {
- dst_chr[index] = src_chr[index];
- ++index;
- }
-
- return 0;
-}
-
-/* @brief unoptimized memcpy, TODO: use isa specific memcpy. */
-size_t memncpy(void* dst, const void* src, size_t len)
-{
-#if __OL == 3 && defined(__riscv)
- riscv_memncpy(dst, src, len);
-#else
-
- if (src == nil || dst == nil)
- return 0;
-
- const char* src_chr = src;
- char* dst_chr = dst;
- size_t index = 0;
-
- while (index < len)
- {
- dst_chr[index] = src_chr[index];
- ++index;
- }
-
- return 0;
-#endif
-}
-
-size_t strlen(const char* str)
-{
- if (*str == 0)
- return 0;
-
- size_t len = 0;
- while (str[len] != '\0')
- ++len;
-
- return len;
-}
-
-size_t strnlen(const char* str, size_t len)
-{
- size_t cnt = 0;
-
- while (len > cnt)
- {
- ++cnt;
-
- if (str[cnt] == '\0')
- return (size_t)-1;
- }
-
- return len;
-}
-
-void strreverse(char* s)
-{
- if (s == nil)
- return;
- if (*s == '\0')
- return;
-
- char *first, *last, temp;
-
- first = s;
- last = s + strlen(s) - 1;
-
- while (first != last)
- {
- temp = *first;
- *(first++) = *last;
- *(last--) = temp;
- }
-}
-
-char* strchr(char* str, const char chr)
-{
- while (*str != chr)
- {
- ++str;
-
- if (*str == 0)
- return nil;
- }
-
- return str;
-}
-
-/// @brief Compare two strings.
-/// @param src source string
-/// @param cmp string to compare.
-/// @return
-size_t strcmp(caddr_t src, caddr_t cmp)
-{
- if (src == null || *src == 0)
- return 1;
- if (cmp == null || *cmp == 0)
- return 1;
-
- int32_t counter = 0;
-
- for (size_t index = 0; src[index] != 0; ++index)
- {
- if (cmp[index] != src[index])
- ++counter;
- }
-
- return counter;
-}
diff --git a/src/hal/coreboot-ahci-driver.c b/src/hal/coreboot-ahci-driver.c
deleted file mode 100644
index 2ef2098..0000000
--- a/src/hal/coreboot-ahci-driver.c
+++ /dev/null
@@ -1,108 +0,0 @@
-/* -------------------------------------------
-
- Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
-
-------------------------------------------- */
-
-/**
- * @file coreboot-ahci-driver.cc
- * @author Amlal EL Mahrouss (amlal@nekernel.org)
- * @brief SATA Disk support, via AHCI.
- * @version 0.2
- * @date 2024-01-16
- *
- * @copyright Copyright (c) 2024-2025, Amlal EL Mahrouss.
- *
- */
-
-#include <lib/pci-tree.h>
-#include <lib/boot.h>
-
-#define CB_AHCI_DRIVER_NAME ("@sata")
-
-/// BUGS: 0
-/// @brief AHCI support for PowerPC.
-
-/// @brief AHCI HBA port.
-typedef struct cb_hba_port
-{
- uint32_t clb; // 0x00, command list base address, 1K-byte aligned
- uint32_t clbu; // 0x04, command list base address upper 32 bits
- uint32_t fb; // 0x08, FIS base address, 256-byte aligned
- uint32_t fbu; // 0x0C, FIS base address upper 32 bits
- uint32_t is; // 0x10, interrupt status
- uint32_t ie; // 0x14, interrupt enable
- uint32_t cmd; // 0x18, command and status
- uint32_t reserved0; // 0x1C, Reserved
- uint32_t tfd; // 0x20, task file data
- uint32_t sig; // 0x24, signature
- uint32_t ssts; // 0x28, SATA status (SCR0:SStatus)
- uint32_t sctl; // 0x2C, SATA control (SCR2:SControl)
- uint32_t serr; // 0x30, SATA error (SCR1:SError)
- uint32_t sact; // 0x34, SATA active (SCR3:SActive)
- uint32_t ci; // 0x38, command issue
- uint32_t sntf; // 0x20, SATA notification (SCR4:SNotification)
- uint32_t fbs; // 0x40, FIS-based switch control
- uint32_t reserved1[11]; // 0x44 ~ 0x6F, Reserved
- uint32_t vendor[4]; // 0x70 ~ 0x7F, vendor specific
-} cb_hba_port_t;
-
-/// @brief Check if port is active.
-/// @param port host bus address port.
-/// @return whether sact is active or not.
-static boolean cb_hba_port_active(volatile cb_hba_port_t* port)
-{
- if (!port)
- return false;
-
- return port->sact;
-}
-
-/// @brief Start HBA command processor.
-/// @param port host bus address port.
-/// @return whether it was successful or not.
-static boolean cb_hba_start_cmd(volatile cb_hba_port_t* port)
-{
- if (!port)
- return false;
-
- size_t timeout = 1000000;
-
- while ((port->cmd & 0x8000))
- {
- if (!timeout)
- return false;
-
- --timeout;
- }
-
- port->cmd |= 0x0001;
- port->cmd |= 0x0010;
-
- return true;
-}
-
-/// @brief Stop HBA command from processing.
-/// @param port host bus address port.
-/// @return whether it was successful or not.
-static boolean cb_hba_stop_cmd(volatile cb_hba_port_t* port)
-{
- if (!port)
- return false;
-
- port->cmd &= ~0x0001;
- port->cmd &= ~0x0010;
-
- while (yes)
- {
- if ((port->cmd & 0x8000))
- continue;
-
- if ((port->cmd & 0x4000))
- continue;
-
- break;
- }
-
- return true;
-}
diff --git a/src/hal/neboot-ahci-driver.c b/src/hal/neboot-ahci-driver.c
new file mode 100644
index 0000000..1ee1272
--- /dev/null
+++ b/src/hal/neboot-ahci-driver.c
@@ -0,0 +1,96 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+/**
+ * @file neboot-ahci-driver.cc
+ * @author Amlal EL Mahrouss (amlal@nekernel.org)
+ * @brief SATA Disk support, via AHCI.
+ * @version 0.2
+ * @date 2024-01-16
+ *
+ * @copyright Copyright (c) 2024-2025, Amlal EL Mahrouss.
+ *
+ */
+
+#include <lib/boot.h>
+#include <lib/pci-tree.h>
+
+#define NB_AHCI_DRIVER_NAME ("@sata")
+
+/// BUGS: 0
+/// @brief Generic AHCI support.
+
+/// @brief AHCI HBA port.
+typedef struct cb_hba_port {
+ uint32_t clb; // 0x00, command list base address, 1K-byte aligned
+ uint32_t clbu; // 0x04, command list base address upper 32 bits
+ uint32_t fb; // 0x08, FIS base address, 256-byte aligned
+ uint32_t fbu; // 0x0C, FIS base address upper 32 bits
+ uint32_t is; // 0x10, interrupt status
+ uint32_t ie; // 0x14, interrupt enable
+ uint32_t cmd; // 0x18, command and status
+ uint32_t reserved0; // 0x1C, Reserved
+ uint32_t tfd; // 0x20, task file data
+ uint32_t sig; // 0x24, signature
+ uint32_t ssts; // 0x28, SATA status (SCR0:SStatus)
+ uint32_t sctl; // 0x2C, SATA control (SCR2:SControl)
+ uint32_t serr; // 0x30, SATA error (SCR1:SError)
+ uint32_t sact; // 0x34, SATA active (SCR3:SActive)
+ uint32_t ci; // 0x38, command issue
+ uint32_t sntf; // 0x20, SATA notification (SCR4:SNotification)
+ uint32_t fbs; // 0x40, FIS-based switch control
+ uint32_t reserved1[11]; // 0x44 ~ 0x6F, Reserved
+ uint32_t vendor[4]; // 0x70 ~ 0x7F, vendor specific
+} cb_hba_port_t;
+
+/// @brief Check if port is active.
+/// @param port host bus address port.
+/// @return whether sact is active or not.
+static boolean cb_hba_port_active(volatile cb_hba_port_t* port) {
+ if (!port) return false;
+
+ return port->sact;
+}
+
+/// @brief Start HBA command processor.
+/// @param port host bus address port.
+/// @return whether it was successful or not.
+static boolean cb_hba_start_cmd(volatile cb_hba_port_t* port) {
+ if (!port) return false;
+
+ size_t timeout = 1000000;
+
+ while ((port->cmd & 0x8000)) {
+ if (!timeout) return false;
+
+ --timeout;
+ }
+
+ port->cmd |= 0x0001;
+ port->cmd |= 0x0010;
+
+ return true;
+}
+
+/// @brief Stop HBA command from processing.
+/// @param port host bus address port.
+/// @return whether it was successful or not.
+static boolean cb_hba_stop_cmd(volatile cb_hba_port_t* port) {
+ if (!port) return false;
+
+ port->cmd &= ~0x0001;
+ port->cmd &= ~0x0010;
+
+ while (yes) {
+ if ((port->cmd & 0x8000)) continue;
+
+ if ((port->cmd & 0x4000)) continue;
+
+ break;
+ }
+
+ return true;
+}
diff --git a/src/hal/coreboot-flash.c b/src/hal/neboot-flash-driver.c
index 1416bc3..d1b0907 100644
--- a/src/hal/coreboot-flash.c
+++ b/src/hal/neboot-flash-driver.c
@@ -4,7 +4,7 @@ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
------------------------------------------- */
+#include <lib/boot.h>
#include <lib/mp-bit.h>
#include <lib/partition-map.h>
#include <lib/pci-tree.h>
-#include <lib/boot.h>
diff --git a/src/coreboot-bootnet.c b/src/neboot-bootnet.c
index 687edd9..a547b35 100644
--- a/src/coreboot-bootnet.c
+++ b/src/neboot-bootnet.c
@@ -1,6 +1,6 @@
/* -------------------------------------------
- Copyright (C) 2025, Amlal EL Mahrouss, all rights reserved.
+ Copyright (C) 2025, Amlal EL Mahrouss, all rights reserved.
------------------------------------------- */
diff --git a/src/neboot-cpu-api.c b/src/neboot-cpu-api.c
new file mode 100644
index 0000000..2491f15
--- /dev/null
+++ b/src/neboot-cpu-api.c
@@ -0,0 +1,20 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <lib/boot.h>
+
+/// @brief Restarts the computer.
+/// @param none.
+void cb_restart_machine(void) {
+#ifdef __COMPILE_RISCV__
+ volatile uint32_t* brd_pwr = (volatile uint32_t*) 0x100000;
+ *brd_pwr = 0x7777; // send reboot signal from DMA.
+
+ while (1) {
+ asm volatile("wfi");
+ }
+#endif
+}
diff --git a/src/neboot-cxx-abi.cc b/src/neboot-cxx-abi.cc
new file mode 100644
index 0000000..88b2a6a
--- /dev/null
+++ b/src/neboot-cxx-abi.cc
@@ -0,0 +1,77 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <lib/cxx-abi.hpp>
+
+/// BUGS: 0
+
+extern "C" __SIZE_TYPE__ cb_put_string(const char* text);
+extern "C" void cb_panic(const char* reason);
+
+extern "C" void __stack_chk_fail() {
+ cb_put_string("[stack-canary] Buffer overflow detected, halting...\n");
+ cb_panic("stack_canary_fail");
+}
+
+void* __dso_handle;
+
+extern "C" __SIZE_TYPE__ cb_put_string(const char* text);
+extern "C" void cb_panic(const char* reason);
+
+atexit_func_entry_t __atexit_funcs[DSO_MAX_OBJECTS];
+uarch_t __atexit_func_count;
+
+extern "C" void __cxa_pure_virtual() {
+ cb_put_string("[__cxa_pure_virtual] Placeholder\n");
+}
+
+extern "C" int __cxa_atexit(void (*f)(void*), void* arg, void* dso) {
+ if (__atexit_func_count >= DSO_MAX_OBJECTS) return -1;
+
+ __atexit_funcs[__atexit_func_count].destructor_func = f;
+ __atexit_funcs[__atexit_func_count].obj_ptr = arg;
+ __atexit_funcs[__atexit_func_count].dso_handle = dso;
+
+ __atexit_func_count++;
+
+ return 0;
+}
+
+extern "C" void __cxa_finalize(void* f) {
+ uarch_t i = __atexit_func_count;
+ if (!f) {
+ while (i--) {
+ if (__atexit_funcs[i].destructor_func) {
+ (*__atexit_funcs[i].destructor_func)(__atexit_funcs[i].obj_ptr);
+ };
+ }
+
+ return;
+ }
+
+ while (i--) {
+ if (__atexit_funcs[i].destructor_func) {
+ (*__atexit_funcs[i].destructor_func)(__atexit_funcs[i].obj_ptr);
+ __atexit_funcs[i].destructor_func = 0;
+ };
+ }
+}
+
+namespace cxxabiv1 {
+extern "C" int __cxa_guard_acquire(__guard* g) {
+ (void) g;
+ return 0;
+}
+
+extern "C" int __cxa_guard_release(__guard* g) {
+ *(char*) g = 1;
+ return 0;
+}
+
+extern "C" void __cxa_guard_abort(__guard* g) {
+ (void) g;
+}
+} // namespace cxxabiv1
diff --git a/src/neboot-partition-map-parse.c b/src/neboot-partition-map-parse.c
new file mode 100644
index 0000000..7d8f80f
--- /dev/null
+++ b/src/neboot-partition-map-parse.c
@@ -0,0 +1,42 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <lib/partition-map.h>
+
+bool cb_parse_partition_block_data_at(voidptr_t blob, size_t blob_sz, size_t index, size_t* end_lba,
+ size_t* start_lba, size_t* sector_sz) {
+ if (!start_lba || !end_lba || !blob || !blob_sz || !sector_sz ||
+ (sizeof(part_block_t) * index) > blob_sz)
+ return false;
+
+ part_block_t* block = (part_block_t*) (blob + (sizeof(part_block_t) * index));
+
+ if (block->version != EPM_REVISION || block->num_blocks < 1 || block->num_blocks > EPM_MAX_BLKS ||
+ strcmp(block->magic, EPM_MAGIC) > 0 || block->lba_end == 0 || block->lba_start == 0) {
+ return false;
+ }
+
+ *end_lba = block->lba_end;
+ *start_lba = block->lba_start;
+ *sector_sz = block->sector_sz;
+
+ return true;
+}
+
+part_block_t* cb_parse_partition_block_at(voidptr_t blob, size_t blob_sz, size_t index) {
+ if (!blob || !blob_sz || (sizeof(part_block_t) * index) > blob_sz) return nil;
+
+ part_block_t* block = (part_block_t*) (blob + (sizeof(part_block_t) * index));
+
+ cb_put_string(block->magic);
+
+ if (block->version != EPM_REVISION || block->num_blocks < 1 || block->num_blocks > EPM_MAX_BLKS ||
+ strcmp(block->magic, EPM_MAGIC) > 0 || block->lba_end == 0 || block->lba_start == 0) {
+ return nil;
+ }
+
+ return block;
+} \ No newline at end of file
diff --git a/src/neboot-partition-map.c b/src/neboot-partition-map.c
new file mode 100644
index 0000000..edc66e7
--- /dev/null
+++ b/src/neboot-partition-map.c
@@ -0,0 +1,30 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <lib/partition-map.h>
+#include <lib/string.h>
+
+// include this for documentation.
+
+#define NB_FILESYSTEM_COUNT (5U)
+#define NB_FILESYSTEM_LIST \
+ { "NeFS", "HeFS", "FAT32", "ext4", "XeFS" }
+
+/// @brief check if filesystem is supported by NeBoot.
+/// @param fs the filesystem magic, as provided by EPM.
+boolean cb_filesystem_exists(caddr_t fs, size_t len) {
+ if (fs == nil || *fs == 0) return no;
+
+ char* fs_list[] = NB_FILESYSTEM_LIST;
+
+ for (size_t fs_index = 0; fs_index < NB_FILESYSTEM_COUNT; fs_index++) {
+ if (strncmp(fs_list[fs_index], fs, strlen(fs_list[fs_index])) == 0) {
+ return yes;
+ }
+ }
+
+ return no;
+}
diff --git a/src/neboot-pci-tree.c b/src/neboot-pci-tree.c
new file mode 100644
index 0000000..a506323
--- /dev/null
+++ b/src/neboot-pci-tree.c
@@ -0,0 +1,96 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+/**
+ * @file neboot-pci-tree.c
+ * @author Amlal EL Mahrouss (amlal@nekernel.org)
+ * @brief PCI tree implementation.
+ * @version 0.1
+ * @date 2024-01-22
+ *
+ * @copyright Copyright (c) 2024 Amlal EL Mahrouss
+ *
+ */
+
+#include <lib/pci-tree.h>
+#include <lib/string.h>
+
+/// BUGS: 0
+
+/// Standard Root table (Mahrouss Table)
+#define NB_PCI_ROOT_NAME "/pci-tree/@/"
+
+static struct hw_cb_pci_tree* cb_base_tree = nil;
+static struct hw_cb_pci_tree* cb_latest_tree = nil;
+static struct hw_cb_pci_tree* cb_last_tree = nil;
+
+/// \brief Init the PCI device tree structure.
+/// \return if it already exists -> false
+/// Otherwise true.
+boolean cb_pci_init_tree(void) {
+ cb_base_tree = (struct hw_cb_pci_tree*) (NB_PCI_TREE_BASE);
+
+ // huh? anyway let's ignore it then.
+ if (cb_base_tree->d_magic != NB_PCI_DEV_MAGIC) {
+ cb_base_tree->d_magic = NB_PCI_DEV_MAGIC;
+
+ memncpy(cb_base_tree->d_name, NB_PCI_ROOT_NAME, strlen(NB_PCI_ROOT_NAME));
+
+ cb_base_tree->d_next_sibling = 0;
+ cb_base_tree->d_off_props = 0;
+ cb_base_tree->d_sz_struct = 0;
+ cb_base_tree->d_sz_props = 0;
+ cb_base_tree->d_off_struct = 0;
+ cb_base_tree->d_version = NB_PCI_VERSION;
+
+ cb_base_tree->d_next_sibling = (cb_pci_num_t) (cb_base_tree + sizeof(struct hw_cb_pci_tree));
+ cb_base_tree->d_first_node = (cb_pci_num_t) cb_base_tree;
+
+ cb_put_string(">> Append root device: " NB_PCI_ROOT_NAME "\r\n");
+ }
+
+ cb_latest_tree = cb_base_tree;
+
+ return yes;
+}
+
+/// \brief Adds a new device to the tree.
+/// \param name the device name.
+/// \param struct_ptr the struct containing the device.
+/// \param struct_sz the structure size.
+boolean cb_pci_append_tree(const caddr_t name, cb_pci_num_t struct_ptr, cb_pci_num_t struct_sz) {
+ if (!name || *name == 0 || cb_latest_tree == nil) return no;
+
+ struct hw_cb_pci_tree* cb_pci_tree = (struct hw_cb_pci_tree*) (cb_latest_tree);
+
+ while (cb_pci_tree->d_magic == NB_PCI_DEV_MAGIC) {
+ if (strcmp(cb_pci_tree->d_name, name) == 0) return no;
+
+ cb_pci_tree = (struct hw_cb_pci_tree*) (cb_pci_tree + sizeof(struct hw_cb_pci_tree));
+ }
+
+ cb_pci_tree->d_magic = NB_PCI_DEV_MAGIC;
+
+ memncpy(cb_pci_tree->d_name, name, strlen(name));
+
+ cb_pci_tree->d_off_struct = struct_ptr;
+ cb_pci_tree->d_sz_struct = struct_sz;
+ cb_pci_tree->d_off_props = 0;
+ cb_pci_tree->d_sz_props = 0;
+ cb_pci_tree->d_version = NB_PCI_VERSION;
+
+ cb_pci_tree->d_next_sibling = (cb_pci_num_t) (cb_pci_tree + sizeof(struct hw_cb_pci_tree));
+ cb_pci_tree->d_first_node = (cb_pci_num_t) cb_latest_tree;
+
+ cb_latest_tree = cb_pci_tree;
+ cb_last_tree = cb_pci_tree;
+
+ cb_put_string(">> Append device: ");
+ cb_put_string(name);
+ cb_put_string("\r\n");
+
+ return yes;
+}
diff --git a/src/neboot-print-name.c b/src/neboot-print-name.c
new file mode 100644
index 0000000..90fe104
--- /dev/null
+++ b/src/neboot-print-name.c
@@ -0,0 +1,27 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <lib/boot.h>
+
+/// @brief Print firmware name.
+/// @param
+void cb_print_name(void) {
+#ifdef __COMPILE_POWERPC__
+ cb_put_string(">> NeBoot for POWERPC.\r\n");
+#endif // __COMPILE_POWERPC__
+
+#ifdef __COMPILE_ARM64__
+ cb_put_string(">> NeBoot for ARM64.\r\n");
+#endif // __COMPILE_POWERPC__
+
+#ifdef __COMPILE_AMD64__
+ cb_put_string(">> NeBoot for AMD64.\r\n");
+#endif // __COMPILE_POWERPC__
+
+#ifdef __COMPILE_RISCV__
+ cb_put_string(">> NeBoot for RISC-V.\r\n");
+#endif // __COMPILE_POWERPC__
+}
diff --git a/src/neboot-start.c b/src/neboot-start.c
new file mode 100644
index 0000000..8384791
--- /dev/null
+++ b/src/neboot-start.c
@@ -0,0 +1,155 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+#include <lib/boot.h>
+#include <lib/mp-bit.h>
+#include <lib/partition-map.h>
+#include <lib/pci-tree.h>
+
+/// BUGS: 0
+
+/////////////////////////////////////////////////////////////////////////////////////////
+
+// @name start.c //
+
+// @brief Start file // This is where the firmware starts it's initialization //
+// code. //
+
+// @author Amlal EL Mahrouss //
+
+/////////////////////////////////////////////////////////////////////////////////////////
+
+extern void cb_start_context(uintptr_t);
+extern void cb_start_rom(void);
+
+extern int cb_boot_processor_ready;
+
+/// @brief hardware thread counter (rv64 only)
+#ifdef __COMPILE_RISCV__
+uint64_t __cb_hart_counter = 0UL;
+#endif
+
+/// @brief Start executing the firmware.
+/// @param
+void cb_start_exec(void) {
+#ifndef __COMPILE_RISCV__
+ static uint64_t __cb_hart_counter = 0UL;
+#endif
+
+ ++__cb_hart_counter;
+
+ uintptr_t hart = __cb_hart_counter;
+
+ // let the hart 0 init our stuff.
+ if (hart == 0) {
+ cb_put_string("CB> Welcome to NeBoot, (c) Amlal EL Mahrouss. Built the ");
+ cb_put_string(__DATE__);
+ cb_put_string("\r\r\n");
+
+#ifdef __COMPILE_POWERPC__
+ cb_put_string("CB> CPU: PowerPC 64-bit Based SoC.\r\r\n");
+#endif // __COMPILE_POWERPC__
+
+#ifdef __COMPILE_AMD64__
+ cb_put_string("CB> CPU: x64 Based SoC.\r\r\n");
+#endif // __COMPILE_AMD64__
+
+#ifdef __COMPILE_ARM64__
+ cb_put_string("CB> CPU: AArch64 Based SoC.\r\r\n");
+#endif // __COMPILE_ARM64__
+
+#ifdef __COMPILE_ARM32__
+ cb_put_string("CB> CPU: AArch32 Based SoC.\r\r\n");
+#endif // __COMPILE_ARM64__
+
+#ifdef __COMPILE_RISCV__
+ cb_put_string("CB> CPU: RV64 Based SoC.\r\r\n");
+#endif // __COMPILE_RISCV__
+ }
+
+ /// @brief Boots here if LX header matches what we except.
+
+ volatile struct cb_boot_header* boot_hdr = (volatile struct cb_boot_header*) (NB_FLASH_BASE_ADDR);
+
+ /**
+ boot if:
+ - ident matches.
+ - version matches.
+ */
+
+ if (boot_hdr->h_mag[0] == NB_BOOT_MAG_0 && boot_hdr->h_mag[1] == NB_BOOT_MAG_1) {
+ uint32_t rev = boot_hdr->h_revision;
+
+#ifdef __aarch64__
+ rev = __builtin_bswap32(rev);
+#endif
+
+ if (rev != NB_BOOT_VER) {
+ if (hart == 0) {
+ cb_put_string("CB> Can't Boot the StageTwo, LX invalid signature. (CB0003)\r\n");
+ }
+ } else {
+ if (hart == 0) {
+ cb_pci_append_tree("@stage2-lx", (cb_pci_num_t) boot_hdr, sizeof(struct cb_boot_header));
+
+ cb_put_string("CB> Executing StageTwo: ");
+ cb_put_string((const char*) boot_hdr->h_name);
+ cb_put_char('\r');
+ cb_put_char('\n');
+
+ // printf("CB> address: %x\n", boot_hdr->h_start_address);
+ }
+
+ if (boot_hdr->h_start_address != 0) {
+ cb_boot_processor_ready = 1;
+ cb_start_context(boot_hdr->h_start_address);
+ }
+
+ cb_put_string("CB> StageTwo has returned? (CB0002)\r\n");
+ }
+ } else {
+ cb_put_string("CB> Trying EPM partition...\r\n");
+
+ part_block_t* blk = cb_parse_partition_block_at((voidptr_t) NB_BOOT_ADDR, EPM_PART_BLK_SZ, 0);
+
+ if (blk) {
+ cb_pci_append_tree("@stage2-epm", (cb_pci_num_t) blk, sizeof(part_block_t) * blk->num_blocks);
+
+ size_t indx = 0;
+ size_t end_lba, start_lba, sector_sz;
+
+ while (indx < blk->num_blocks) {
+ if (cb_parse_partition_block_data_at(blk, EPM_PART_BLK_SZ * blk->num_blocks, indx, &end_lba,
+ &start_lba, &sector_sz) == no) {
+ ++indx;
+ continue;
+ }
+
+ cb_boot_processor_ready = 1;
+ cb_start_context((uintptr_t) (voidptr_t) blk + start_lba);
+
+ if (hart == 1) {
+ cb_put_string("CB> Can't boot to StageTwo. (CB0001)\r\n");
+ }
+ }
+ }
+
+ if (hart == 1) {
+ cb_put_string(
+ "CB> Can't boot to StageTwo via EPM, no bootable partition blocks found. (CB0001)\r\n");
+ }
+ }
+
+ /// end of TODO
+
+ if (hart > 1) {
+ while (yes) {
+ if (__cb_hart_counter == 0) {
+ cb_restart_machine();
+ }
+ }
+ }
+}
diff --git a/src/neboot-string.c b/src/neboot-string.c
new file mode 100644
index 0000000..0c249a4
--- /dev/null
+++ b/src/neboot-string.c
@@ -0,0 +1,153 @@
+/* -------------------------------------------
+
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+
+------------------------------------------- */
+
+/**
+ * @file neboot-string.c
+ * @author Amlal EL Mahrouss (amlal@nekernel.org)
+ * @brief string library.
+ * @version 0.1
+ * @date 2024-01-16
+ *
+ * @copyright Copyright (c) 2024 Amlal EL Mahrouss
+ *
+ */
+
+#include <lib/string.h>
+
+/// BUGS: 0
+
+size_t strncmp(const char* src, const char* cmp, size_t size) {
+ if (src == nil) return 0;
+
+ int32_t counter = 0;
+
+ for (size_t index = 0; index < size; ++index) {
+ if (src[index] != cmp[index]) ++counter;
+ }
+
+ return counter;
+}
+
+void* memset(void* ptr, const char value, size_t len) {
+ if (ptr == nil) return nil;
+
+ char* start = ptr;
+
+ while (len) {
+ *start = value;
+ ++start;
+
+ --len;
+ }
+
+ return (void*) start;
+}
+
+void* memmove(void* dest, const void* src, size_t len) {
+ memncpy(dest, src, len);
+ return dest;
+}
+
+size_t memcpy(void* dst, const void* src) {
+ if (src == nil || dst == nil) return 0;
+
+ const char* src_chr = src;
+ char* dst_chr = dst;
+ size_t index = 0;
+ size_t len = strlen(src);
+
+ while (index < len) {
+ dst_chr[index] = src_chr[index];
+ ++index;
+ }
+
+ return 0;
+}
+
+/* @brief unoptimized memcpy, TODO: use isa specific memcpy. */
+size_t memncpy(void* dst, const void* src, size_t len) {
+#if __OL == 3 && defined(__riscv)
+ riscv_memncpy(dst, src, len);
+#else
+
+ if (src == nil || dst == nil) return 0;
+
+ const char* src_chr = src;
+ char* dst_chr = dst;
+ size_t index = 0;
+
+ while (index < len) {
+ dst_chr[index] = src_chr[index];
+ ++index;
+ }
+
+ return 0;
+#endif
+}
+
+size_t strlen(const char* str) {
+ if (*str == 0) return 0;
+
+ size_t len = 0;
+ while (str[len] != '\0') ++len;
+
+ return len;
+}
+
+size_t strnlen(const char* str, size_t len) {
+ size_t cnt = 0;
+
+ while (len > cnt) {
+ ++cnt;
+
+ if (str[cnt] == '\0') return (size_t) -1;
+ }
+
+ return len;
+}
+
+void strreverse(char* s) {
+ if (s == nil) return;
+ if (*s == '\0') return;
+
+ char *first, *last, temp;
+
+ first = s;
+ last = s + strlen(s) - 1;
+
+ while (first != last) {
+ temp = *first;
+ *(first++) = *last;
+ *(last--) = temp;
+ }
+}
+
+char* strchr(char* str, const char chr) {
+ while (*str != chr) {
+ ++str;
+
+ if (*str == 0) return nil;
+ }
+
+ return str;
+}
+
+/// @brief Compare two strings.
+/// @param src source string
+/// @param cmp string to compare.
+/// @return
+size_t strcmp(caddr_t src, caddr_t cmp) {
+ if (src == null || *src == 0) return 1;
+ if (cmp == null || *cmp == 0) return 1;
+
+ int32_t counter = 0;
+
+ for (size_t index = 0; src[index] != 0; ++index) {
+ if (cmp[index] != src[index]) ++counter;
+ }
+
+ return counter;
+}
diff --git a/src/ppc64/makefile b/src/ppc64/makefile
index 8adb03f..d046098 100644
--- a/src/ppc64/makefile
+++ b/src/ppc64/makefile
@@ -1,7 +1,7 @@
#
# ========================================================
#
- # CoreBoot
+ # NeBoot
# Date Added: 08/11/2023
# Copyright 2024, Amlal El Mahrouss, all rights reserved.
#
@@ -35,7 +35,7 @@ IMG_CMD=qemu-img create -f qcow2 epm.img 256M
.PHONY: all
all: firmware-link
- @echo "[CoreBoot] build done."
+ @echo "[NeBoot] build done."
.PHONY: firmware-link
firmware-link: firmware-compile
diff --git a/src/ppc64/ppc64-boot.S b/src/ppc64/ppc64-boot.S
index 28d1865..de366fc 100644
--- a/src/ppc64/ppc64-boot.S
+++ b/src/ppc64/ppc64-boot.S
@@ -29,11 +29,11 @@ cb_reset_vector:
.global cb_start_context
.global cb_boot_processor_ready
-.equ CB_BOOT_ADDR, 0x1030000
+.equ NB_BOOT_ADDR, 0x1030000
cb_start_rom:
- lis 3, CB_BOOT_ADDR@h
- addi 3, 3, CB_BOOT_ADDR@l
+ lis 3, NB_BOOT_ADDR@h
+ addi 3, 3, NB_BOOT_ADDR@l
blr
diff --git a/src/ppc64/ppc64-err.c b/src/ppc64/ppc64-err.c
index 13d944c..1ef0089 100644
--- a/src/ppc64/ppc64-err.c
+++ b/src/ppc64/ppc64-err.c
@@ -1,6 +1,6 @@
/* -------------------------------------------
- Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
------------------------------------------- */
@@ -10,14 +10,12 @@
/// @brief Goes into a panic state.
/// @param reason why?
-void cb_panic(const char* reason)
-{
- cb_put_string("Error: ");
- cb_put_string(reason);
- cb_put_char('\n');
+void cb_panic(const char* reason) {
+ cb_put_string("Error: ");
+ cb_put_string(reason);
+ cb_put_char('\n');
- while (yes)
- {
- (void)0;
- }
+ while (yes) {
+ (void) 0;
+ }
}
diff --git a/src/ppc64/ppc64-hal.c b/src/ppc64/ppc64-hal.c
index f47f0b3..993e5be 100644
--- a/src/ppc64/ppc64-hal.c
+++ b/src/ppc64/ppc64-hal.c
@@ -1,100 +1,87 @@
/* -------------------------------------------
- Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
------------------------------------------- */
#include <lib/ppc64/mmu.h>
#include <lib/ppc64/processor.h>
-#include <lib/pci-tree.h>
#include <lib/boot.h>
+#include <lib/pci-tree.h>
-void cb_write_tlb(uint32_t mas0, uint32_t mas1, uint32_t mas2, uint32_t mas3, uint32_t mas7)
-{
- mtspr(MAS0, mas0);
- mtspr(MAS1, mas1);
- mtspr(MAS2, mas2);
- mtspr(MAS3, mas3);
- mtspr(MAS7, mas7);
+void cb_write_tlb(uint32_t mas0, uint32_t mas1, uint32_t mas2, uint32_t mas3, uint32_t mas7) {
+ mtspr(MAS0, mas0);
+ mtspr(MAS1, mas1);
+ mtspr(MAS2, mas2);
+ mtspr(MAS3, mas3);
+ mtspr(MAS7, mas7);
- cb_flush_tlb();
+ cb_flush_tlb();
}
-void cb_set_tlb(uint8_t tlb,
- uint32_t epn,
- uint64_t rpn,
- uint8_t perms,
- uint8_t wimge,
- uint8_t ts,
- uint8_t esel,
- uint8_t tsize,
- uint8_t iprot)
-{
- if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1 && (tsize & 1))
- {
- // this mmu-version does not allow odd tsize values
- return;
- }
-
- uint32_t mas0 = FSL_BOOKE_MAS0(tlb, esel, 0);
- uint32_t mas1 = FSL_BOOKE_MAS1(1, iprot, 0, ts, tsize);
- uint32_t mas2 = FSL_BOOKE_MAS2(epn, wimge);
- uint32_t mas3 = FSL_BOOKE_MAS3(rpn, 0, perms);
- uint32_t mas7 = FSL_BOOKE_MAS7(rpn);
-
- cb_write_tlb(mas0, mas1, mas2, mas3, mas7);
+void cb_set_tlb(uint8_t tlb, uint32_t epn, uint64_t rpn, uint8_t perms, uint8_t wimge, uint8_t ts,
+ uint8_t esel, uint8_t tsize, uint8_t iprot) {
+ if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1 && (tsize & 1)) {
+ // this mmu-version does not allow odd tsize values
+ return;
+ }
+
+ uint32_t mas0 = FSL_BOOKE_MAS0(tlb, esel, 0);
+ uint32_t mas1 = FSL_BOOKE_MAS1(1, iprot, 0, ts, tsize);
+ uint32_t mas2 = FSL_BOOKE_MAS2(epn, wimge);
+ uint32_t mas3 = FSL_BOOKE_MAS3(rpn, 0, perms);
+ uint32_t mas7 = FSL_BOOKE_MAS7(rpn);
+
+ cb_write_tlb(mas0, mas1, mas2, mas3, mas7);
}
/// @brief Init hardware before jumping to kernel.
/// @param
-void cb_init_hw(void)
-{
-
- /// amlal:
- /// map VGA framebuffer
- cb_set_tlb(0, CB_FRAMEBUFFER_ADDR, /* v_addr, 0x0000A0000 */
- 0x0000A000, /* p_addr. 0x0000A0000 */
- MAS3_SW | MAS3_SR, /* perm type=TLB_MAP_IO */
- MAS2_I | MAS2_G, /* wimge type=TLB_MAP_IO */
- 0, /* ts i.e AS=0 */
- 1, /* esel (a.k.a tlb_index*/
- BOOKE_PAGESZ_64K, /* tsize ie 2^10kB ie 1MB */
- 1);
-
- // map ccsrbar and uart.
- // at start we execute from esel = 0, so chose something else..
- cb_set_tlb(1, CB_UART_BASE, /* v_addr 0xe0000000 see qemu-ppce500.h */
- 0xfe0000000, /* p_addr. 0xfe0000000 */
- MAS3_SW | MAS3_SR, /* perm type=TLB_MAP_IO */
- MAS2_I | MAS2_G, /* wimge type=TLB_MAP_IO */
- 0, /* ts i.e AS=0 */
- 2, /* esel (a.k.a tlb_index*/
- BOOKE_PAGESZ_1M, /* tsize ie 2^10kB ie 1MB */
- 1);
-
- /// amlal:
- /// map pci base for kernel
- cb_set_tlb(0, CB_BASE_ADDRESS, /* v_addr, 0xFE008000 */
- 0xFE0008000, /* p_addr. 0xfe0000000 */
- MAS3_SW | MAS3_SR, /* perm type=TLB_MAP_IO */
- MAS2_I | MAS2_G, /* wimge type=TLB_MAP_IO */
- 0, /* ts i.e AS=0 */
- 3, /* esel (a.k.a tlb_index*/
- BOOKE_PAGESZ_1M, /* tsize ie 2^10kB ie 1MB */
- 1);
-
- cb_pci_init_tree();
-
- cb_pci_append_tree("@fb", CB_FRAMEBUFFER_ADDR, 0x0);
- cb_pci_append_tree("@mbci", 0x0, 0x0); // did not found a MBCI base for now...
- cb_pci_append_tree("@serial", CB_UART_BASE, 0);
- cb_pci_append_tree("@pci", CB_BASE_ADDRESS, 0x0);
-
- cb_flush_tlb();
+void cb_init_hw(void) {
+ /// amlal:
+ /// map VGA framebuffer
+ cb_set_tlb(0, NB_FRAMEBUFFER_ADDR, /* v_addr, 0x0000A0000 */
+ 0x0000A000, /* p_addr. 0x0000A0000 */
+ MAS3_SW | MAS3_SR, /* perm type=TLB_MAP_IO */
+ MAS2_I | MAS2_G, /* wimge type=TLB_MAP_IO */
+ 0, /* ts i.e AS=0 */
+ 1, /* esel (a.k.a tlb_index*/
+ BOOKE_PAGESZ_64K, /* tsize ie 2^10kB ie 1MB */
+ 1);
+
+ // map ccsrbar and uart.
+ // at start we execute from esel = 0, so chose something else..
+ cb_set_tlb(1, NB_UART_BASE, /* v_addr 0xe0000000 see qemu-ppce500.h */
+ 0xfe0000000, /* p_addr. 0xfe0000000 */
+ MAS3_SW | MAS3_SR, /* perm type=TLB_MAP_IO */
+ MAS2_I | MAS2_G, /* wimge type=TLB_MAP_IO */
+ 0, /* ts i.e AS=0 */
+ 2, /* esel (a.k.a tlb_index*/
+ BOOKE_PAGESZ_1M, /* tsize ie 2^10kB ie 1MB */
+ 1);
+
+ /// amlal:
+ /// map pci base for kernel
+ cb_set_tlb(0, NB_BASE_ADDRESS, /* v_addr, 0xFE008000 */
+ 0xFE0008000, /* p_addr. 0xfe0000000 */
+ MAS3_SW | MAS3_SR, /* perm type=TLB_MAP_IO */
+ MAS2_I | MAS2_G, /* wimge type=TLB_MAP_IO */
+ 0, /* ts i.e AS=0 */
+ 3, /* esel (a.k.a tlb_index*/
+ BOOKE_PAGESZ_1M, /* tsize ie 2^10kB ie 1MB */
+ 1);
+
+ cb_pci_init_tree();
+
+ cb_pci_append_tree("@fb", NB_FRAMEBUFFER_ADDR, 0x0);
+ cb_pci_append_tree("@mbci", 0x0, 0x0); // did not found a MBCI base for now...
+ cb_pci_append_tree("@serial", NB_UART_BASE, 0);
+ cb_pci_append_tree("@pci", NB_BASE_ADDRESS, 0x0);
+
+ cb_flush_tlb();
}
-void cb_flush_tlb(void)
-{
- asm volatile("isync;tlbwe;msync;isync");
+void cb_flush_tlb(void) {
+ asm volatile("isync;tlbwe;msync;isync");
};
diff --git a/src/ppc64/ppc64-uart.c b/src/ppc64/ppc64-uart.c
index c908eae..a26a806 100644
--- a/src/ppc64/ppc64-uart.c
+++ b/src/ppc64/ppc64-uart.c
@@ -1,48 +1,43 @@
/* -------------------------------------------
- Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
------------------------------------------- */
-#include <lib/string.h>
#include <lib/boot.h>
+#include <lib/string.h>
/// BUGS: 0
-#define CB_NS16550_COM1 (CB_UART_BASE + 0x4500)
-#define CB_NS16550_COM2 (CB_UART_BASE + 0x4600)
+#define NB_NS16550_COM1 (NB_UART_BASE + 0x4500)
+#define NB_NS16550_COM2 (NB_UART_BASE + 0x4600)
-volatile ascii_char_t* const UART0DR = (ascii_char_t*)CB_NS16550_COM1;
+volatile ascii_char_t* const UART0DR = (ascii_char_t*) NB_NS16550_COM1;
/* this file handles the UART */
/// @brief Get character from UART.
/// @param
/// @return
-utf_char_t cb_get_char(void)
-{
- while (!(*(((volatile uint8_t*)UART0DR) + 0x05) & 0x01))
- ;
- return (utf_char_t)*UART0DR;
+utf_char_t cb_get_char(void) {
+ while (!(*(((volatile uint8_t*) UART0DR) + 0x05) & 0x01));
+ return (utf_char_t) *UART0DR;
}
/// @brief Put character into UART.
/// @param ch
-void cb_put_char(utf_char_t ch)
-{
- *UART0DR = (ascii_char_t)(ch);
+void cb_put_char(utf_char_t ch) {
+ *UART0DR = (ascii_char_t) (ch);
}
/// @brief Put string in UART.
/// @param text the input text.
-size_t cb_put_string(const char* text)
-{
- while (*text != '\0')
- { /* Loop until end of string */
+size_t cb_put_string(const char* text) {
+ while (*text != '\0') { /* Loop until end of string */
- cb_put_char(*text); /* Transmit char */
+ cb_put_char(*text); /* Transmit char */
- text++; /* Next char */
- }
- return 0;
+ text++; /* Next char */
+ }
+ return 0;
}
diff --git a/src/rv64/ci.make b/src/rv64/ci.make
index 757d6c1..c9936dd 100644
--- a/src/rv64/ci.make
+++ b/src/rv64/ci.make
@@ -1,7 +1,7 @@
#
# ========================================================
#
- # CoreBoot
+ # NeBoot
# Date Added: 08/11/2023
# Copyright 2024, Amlal El Mahrouss, all rights reserved.
#
@@ -24,7 +24,7 @@ EMU=qemu-system-riscv64 -m 4G -smp 2 -machine virt -bios $(FIRMWARE) -d int -dev
.PHONY: all
all: firmware-link
- @echo "[CoreBoot] Done."
+ @echo "[NeBoot] Done."
# link (make firmware)
.PHONY: firmware-link
diff --git a/src/rv64/makefile b/src/rv64/makefile
index 757d6c1..c9936dd 100644
--- a/src/rv64/makefile
+++ b/src/rv64/makefile
@@ -1,7 +1,7 @@
#
# ========================================================
#
- # CoreBoot
+ # NeBoot
# Date Added: 08/11/2023
# Copyright 2024, Amlal El Mahrouss, all rights reserved.
#
@@ -24,7 +24,7 @@ EMU=qemu-system-riscv64 -m 4G -smp 2 -machine virt -bios $(FIRMWARE) -d int -dev
.PHONY: all
all: firmware-link
- @echo "[CoreBoot] Done."
+ @echo "[NeBoot] Done."
# link (make firmware)
.PHONY: firmware-link
diff --git a/src/rv64/rv64-api.s b/src/rv64/rv64-api.s
index 8fe29e1..b4a0749 100644
--- a/src/rv64/rv64-api.s
+++ b/src/rv64/rv64-api.s
@@ -1,6 +1,6 @@
# ====================================
#
-# Amlal EL Mahrouss CoreBoot
+# Amlal EL Mahrouss NeBoot
# (c) Amlal EL Mahrouss all rights reserved.
#
# Purpose: Assembler API for RISC-V
diff --git a/src/rv64/rv64-boot.s b/src/rv64/rv64-boot.s
index fb95d55..a9afd02 100644
--- a/src/rv64/rv64-boot.s
+++ b/src/rv64/rv64-boot.s
@@ -1,7 +1,7 @@
/*
* ========================================================
*
- * CoreBoot
+ * NeBoot
* Copyright 2024, Amlal EL Mahrouss, all rights reserved.
*
* Purpose: Startup code for RISC-V.
@@ -81,10 +81,10 @@ cb_start_context:
add ra, zero, a1
mret
-.equ CB_BOOT_ADDR, 0x80020000
+.equ NB_BOOT_ADDR, 0x80020000
cb_start_rom:
- li x5, CB_BOOT_ADDR
+ li x5, NB_BOOT_ADDR
mv ra, zero
add ra, zero, t0
mret
diff --git a/src/rv64/rv64-err.c b/src/rv64/rv64-err.c
index 19d0f3c..a616d83 100644
--- a/src/rv64/rv64-err.c
+++ b/src/rv64/rv64-err.c
@@ -1,6 +1,6 @@
/* -------------------------------------------
- Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
------------------------------------------- */
@@ -10,14 +10,12 @@
/// @brief Goes into a panic state.
/// @param reason why?
-void cb_panic(const char* reason)
-{
- cb_put_string("Error: ");
- cb_put_string(reason);
- cb_put_char('\n');
+void cb_panic(const char* reason) {
+ cb_put_string("Error: ");
+ cb_put_string(reason);
+ cb_put_char('\n');
- while (yes)
- {
- asm volatile("wfi");
- }
+ while (yes) {
+ asm volatile("wfi");
+ }
}
diff --git a/src/rv64/rv64-uart.c b/src/rv64/rv64-uart.c
index 0bc6517..0fb8ab4 100644
--- a/src/rv64/rv64-uart.c
+++ b/src/rv64/rv64-uart.c
@@ -1,6 +1,6 @@
/* -------------------------------------------
- Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
+ Copyright (C) 2024, Amlal EL Mahrouss, all rights reserved.
------------------------------------------- */
@@ -11,51 +11,43 @@
/* this file handles the UART */
-static uint8_t* cb_uart_ptr = (uint8_t*)CB_UART_BASE;
+static uint8_t* cb_uart_ptr = (uint8_t*) NB_UART_BASE;
-utf_char_t cb_get_char(void)
-{
- uintptr_t ptr = CB_UART_BASE;
+utf_char_t cb_get_char(void) {
+ uintptr_t ptr = NB_UART_BASE;
- while (!(*(((volatile uint8_t*)ptr) + 0x05) & 0x01))
- ;
+ while (!(*(((volatile uint8_t*) ptr) + 0x05) & 0x01));
- return (utf_char_t)*cb_uart_ptr;
+ return (utf_char_t) *cb_uart_ptr;
}
// we need that one, to avoid sending mutliple chars to UART.
static boolean cb_locked_put_char = no;
-void cb_put_char(utf_char_t ch)
-{
- int32_t timeout = 0;
+void cb_put_char(utf_char_t ch) {
+ int32_t timeout = 0;
- while (cb_locked_put_char)
- {
- ++timeout;
+ while (cb_locked_put_char) {
+ ++timeout;
- if (timeout > 1000000)
- break;
- }
+ if (timeout > 1000000) break;
+ }
- cb_locked_put_char = yes;
- *cb_uart_ptr = ch;
- cb_locked_put_char = no;
+ cb_locked_put_char = yes;
+ *cb_uart_ptr = ch;
+ cb_locked_put_char = no;
}
/// @brief UART put string
/// @param text the input text.
-size_t cb_put_string(const char* text)
-{
- if (text == nil)
- return 0;
+size_t cb_put_string(const char* text) {
+ if (text == nil) return 0;
- size_t i = 0;
+ size_t i = 0;
- for (; i < strlen(text); i++)
- {
- cb_put_char(text[i]);
- }
+ for (; i < strlen(text); i++) {
+ cb_put_char(text[i]);
+ }
- return i;
+ return i;
}